rit_space18

New design methodology optimizes construction process for space components

Can new design methodology optimize the development of space components? Professor Reza Emamis research group in Space technology is researching to see if Concurrent Engineering and Hardware-in-the-loop simulations can be used in the university’s new laboratory for nano-satellites and in the space industry as a whole.

– With the current trend in both miniaturizing space systems and developing them at a lower cost and faster pace by using off-the-shelf products, the task of designing such systems at the expected levels of quality and reliability has become increasingly challenging. Concurrent Engineering takes benefit from the synergy between various subsystems to arrive at solutions that can hardly be obtained through the traditional, partition-based design approaches, said Professor Reza Emami.

In the development of advanced technological space systems it has been common to design and build parts separately which are later assembled in the final phase, this can result in  a faulty design because engineers have carried out separately their own development without taking into consideration the requirements of the rest of the components. Concurrent Engineering can solve this problem with a holistic approach where the entire design process is based on overall design frame.

– Concurrent engineering allows for shorter design phases which mean that development teams use less resources and time which in the end leads to a more efficient and cheaper build process. The method is common in the automotive industry but not as common in the space industry, we want to explore the method and use it in our laboratory for nano-satellites, said PhD Chris Nieto.

Along with the space company RUAG, he is also examining opportunities surrounding Hardware-in-the-loop simulations for the NRFP-3 project where RUAG want to use agile methods in the development of new onboard computers.

A common simulation often consists of a mathematical model which is run in a computer, but sometimes the mathematical model is too complex or you want to validate a design. In that case, the actual hardware can interface the same computer and interact with the simulation to see if its behaviour matches the requirements.

– In a Hardware-in-the-loop simulation we focus on the interfacebetween the device under test and the computer to analyse its inputs and outputs. Then, by constructing prototypes we can validate them and improve them early on and avoid catastrophic failures in the launch and operative phases.

Chris Nieto’s research is primarily focused on space components development, and through starting with the creation of early prototypes, his hope is to bring in Hardware-in-the-loop simulations and Concurrent Engineering on to the design schedule in the space industry and that it will lead to much faster hardware design and development processes.

– It promotes a much more dynamic development, we were able to show a demonstration of our hardware-in-the-loop simulation platform at the Space Forum in May and we hope to perform our first simulations soon, said Chris Nieto, a PhD student at Luleå University of Technology.